BFR/Clean_5_24V_I/dbandHi = 0.0
BFR/Clean_5_24V_I/dbandLo = 0.0
BFR/Clean_5_24V_I/limitHi = 0.0
BFR/Clean_5_24V_I/limitLo = 0.0
BFR/Dirty_24V_I/dbandHi = 0.0
BFR/Dirty_24V_I/dbandLo = 0.0
BFR/Dirty_24V_I/limitHi = 0.0
BFR/Dirty_24V_I/limitLo = 0.0
BFR/Dirty_28V_I/dbandHi = 0.0
BFR/Dirty_28V_I/dbandLo = 0.0
BFR/Dirty_28V_I/limitHi = 0.0
BFR/Dirty_28V_I/limitLo = 0.0
BFR/Dirty_48V_I/dbandHi = 0.0
BFR/Dirty_48V_I/dbandLo = 0.0
BFR/Dirty_48V_I/limitHi = 0.0
BFR/Dirty_48V_I/limitLo = 0.0
BFR/Heater_I/dbandHi = 0.0
BFR/Heater_I/dbandLo = 0.0
BFR/Heater_I/limitHi = 0.0
BFR/Heater_I/limitLo = 0.0
BFR/Protection_I/dbandHi = 0.0
BFR/Protection_I/dbandLo = 0.0
BFR/Protection_I/limitHi = 0.0
BFR/Protection_I/limitLo = 0.0
PDU_24VC/24VC_Board_T/dbandHi = 0.0
PDU_24VC/24VC_Board_T/dbandLo = 0.0
PDU_24VC/24VC_Board_T/limitHi = 0.0
PDU_24VC/24VC_Board_T/limitLo = 0.0
PDU_24VC/24VC_FPGA_T/dbandHi = 0.0
PDU_24VC/24VC_FPGA_T/dbandLo = 0.0
PDU_24VC/24VC_FPGA_T/limitHi = 0.0
PDU_24VC/24VC_FPGA_T/limitLo = 0.0
PDU_24VC/24VC_Main_I/dbandHi = 0.0
PDU_24VC/24VC_Main_I/dbandLo = 0.0
PDU_24VC/24VC_Main_I/limitHi = 0.0
PDU_24VC/24VC_Main_I/limitLo = 0.0
PDU_24VC/24VC_Main_T/dbandHi = 0.0
PDU_24VC/24VC_Main_T/dbandLo = 0.0
PDU_24VC/24VC_Main_T/limitHi = 0.0
PDU_24VC/24VC_Main_T/limitLo = 0.0
PDU_24VC/24VC_Main_V/dbandHi = 0.0
PDU_24VC/24VC_Main_V/dbandLo = 0.0
PDU_24VC/24VC_Main_V/limitHi = 0.0
PDU_24VC/24VC_Main_V/limitLo = 0.0
PDU_24VC/Body_Purge_I/dbandHi = 0.0
PDU_24VC/Body_Purge_I/dbandLo = 0.0
PDU_24VC/Body_Purge_I/limitHi = 0.0
PDU_24VC/Body_Purge_I/limitLo = 0.0
PDU_24VC/Body_Purge_V/dbandHi = 0.0
PDU_24VC/Body_Purge_V/dbandLo = 0.0
PDU_24VC/Body_Purge_V/limitHi = 0.0
PDU_24VC/Body_Purge_V/limitLo = 0.0
PDU_24VC/Bpu_Maq20_I/dbandHi = 0.0
PDU_24VC/Bpu_Maq20_I/dbandLo = 0.0
PDU_24VC/Bpu_Maq20_I/limitHi = 0.0
PDU_24VC/Bpu_Maq20_I/limitLo = 0.0
PDU_24VC/Bpu_Maq20_V/dbandHi = 0.0
PDU_24VC/Bpu_Maq20_V/dbandLo = 0.0
PDU_24VC/Bpu_Maq20_V/limitHi = 0.0
PDU_24VC/Bpu_Maq20_V/limitLo = 0.0
PDU_24VC/FES_Shu_HCU_I/dbandHi = 0.0
PDU_24VC/FES_Shu_HCU_I/dbandLo = 0.0
PDU_24VC/FES_Shu_HCU_I/limitHi = 0.0
PDU_24VC/FES_Shu_HCU_I/limitLo = 0.0
PDU_24VC/FES_Shu_HCU_V/dbandHi = 0.0
PDU_24VC/FES_Shu_HCU_V/dbandLo = 0.0
PDU_24VC/FES_Shu_HCU_V/limitHi = 0.0
PDU_24VC/FES_Shu_HCU_V/limitLo = 0.0
PDU_24VC/Gauges_I/dbandHi = 0.0
PDU_24VC/Gauges_I/dbandLo = 0.0
PDU_24VC/Gauges_I/limitHi = 0.0
PDU_24VC/Gauges_I/limitLo = 0.0
PDU_24VC/Gauges_V/dbandHi = 0.0
PDU_24VC/Gauges_V/dbandLo = 0.0
PDU_24VC/Gauges_V/limitHi = 0.0
PDU_24VC/Gauges_V/limitLo = 0.0
PDU_24VC/Ion_Pumps_I/dbandHi = 0.0
PDU_24VC/Ion_Pumps_I/dbandLo = 0.0
PDU_24VC/Ion_Pumps_I/limitHi = 0.0
PDU_24VC/Ion_Pumps_I/limitLo = 0.0
PDU_24VC/Ion_Pumps_V/dbandHi = 0.0
PDU_24VC/Ion_Pumps_V/dbandLo = 0.0
PDU_24VC/Ion_Pumps_V/limitHi = 0.0
PDU_24VC/Ion_Pumps_V/limitLo = 0.0
PDU_24VC/FES_Encoder_I/dbandHi = 0.0
PDU_24VC/FES_Encoder_I/dbandLo = 0.0
PDU_24VC/FES_Encoder_I/limitHi = 0.0
PDU_24VC/FES_Encoder_I/limitLo = 0.0
PDU_24VC/FES_Encoder_V/dbandHi = 0.0
PDU_24VC/FES_Encoder_V/dbandLo = 0.0
PDU_24VC/FES_Encoder_V/limitHi = 0.0
PDU_24VC/FES_Encoder_V/limitLo = 0.0
PDU_24VD/24VD_Board_T/dbandHi = 0.0
PDU_24VD/24VD_Board_T/dbandLo = 0.0
PDU_24VD/24VD_Board_T/limitHi = 0.0
PDU_24VD/24VD_Board_T/limitLo = 0.0
PDU_24VD/24VD_FPGA_T/dbandHi = 0.0
PDU_24VD/24VD_FPGA_T/dbandLo = 0.0
PDU_24VD/24VD_FPGA_T/limitHi = 0.0
PDU_24VD/24VD_FPGA_T/limitLo = 0.0
PDU_24VD/24VD_Main_I/dbandHi = 0.0
PDU_24VD/24VD_Main_I/dbandLo = 0.0
PDU_24VD/24VD_Main_I/limitHi = 0.0
PDU_24VD/24VD_Main_I/limitLo = 0.0
PDU_24VD/24VD_Main_T/dbandHi = 0.0
PDU_24VD/24VD_Main_T/dbandLo = 0.0
PDU_24VD/24VD_Main_T/limitHi = 0.0
PDU_24VD/24VD_Main_T/limitLo = 0.0
PDU_24VD/24VD_Main_V/dbandHi = 0.0
PDU_24VD/24VD_Main_V/dbandLo = 0.0
PDU_24VD/24VD_Main_V/limitHi = 0.0
PDU_24VD/24VD_Main_V/limitLo = 0.0
PDU_24VD/PF_Turbo_I/dbandHi = 0.0
PDU_24VD/PF_Turbo_I/dbandLo = 0.0
PDU_24VD/PF_Turbo_I/limitHi = 0.0
PDU_24VD/PF_Turbo_I/limitLo = 0.0
PDU_24VD/PF_Turbo_V/dbandHi = 0.0
PDU_24VD/PF_Turbo_V/dbandLo = 0.0
PDU_24VD/PF_Turbo_V/limitHi = 0.0
PDU_24VD/PF_Turbo_V/limitLo = 0.0
PDU_48V/48V_Board_T/dbandHi = 0.0
PDU_48V/48V_Board_T/dbandLo = 0.0
PDU_48V/48V_Board_T/limitHi = 0.0
PDU_48V/48V_Board_T/limitLo = 0.0
PDU_48V/48V_FPGA_T/dbandHi = 0.0
PDU_48V/48V_FPGA_T/dbandLo = 0.0
PDU_48V/48V_FPGA_T/limitHi = 0.0
PDU_48V/48V_FPGA_T/limitLo = 0.0
PDU_48V/48V_Main_I/dbandHi = 0.0
PDU_48V/48V_Main_I/dbandLo = 0.0
PDU_48V/48V_Main_I/limitHi = 0.0
PDU_48V/48V_Main_I/limitLo = 0.0
PDU_48V/48V_Main_T/dbandHi = 0.0
PDU_48V/48V_Main_T/dbandLo = 0.0
PDU_48V/48V_Main_T/limitHi = 0.0
PDU_48V/48V_Main_T/limitLo = 0.0
PDU_48V/48V_Main_V/dbandHi = 0.0
PDU_48V/48V_Main_V/dbandLo = 0.0
PDU_48V/48V_Main_V/limitHi = 0.0
PDU_48V/48V_Main_V/limitLo = 0.0
PDU_48V/Purge_Fan_I/dbandHi = 0.0
PDU_48V/Purge_Fan_I/dbandLo = 0.0
PDU_48V/Purge_Fan_I/limitHi = 0.0
PDU_48V/Purge_Fan_I/limitLo = 0.0
PDU_48V/Purge_Fan_V/dbandHi = 0.0
PDU_48V/Purge_Fan_V/dbandLo = 0.0
PDU_48V/Purge_Fan_V/limitHi = 0.0
PDU_48V/Purge_Fan_V/limitLo = 0.0
